Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Bipolar and fet
Patent
1996-09-03
1998-05-19
Westin, Edward P.
Electronic digital logic circuitry
Function of and, or, nand, nor, or not
Bipolar and fet
326 84, 326 17, 326 26, H03K 1902, H03K 1704
Patent
active
057540616
ABSTRACT:
A Bi-CMOS circuit includes a first bipolar, a second bipolar transistor and a CMOS control unit for performing switching controls of the first and second bipolar transistors on the basis of an input signal applied to an input terminal and for controlling an output signal output via the output terminal on the basis of the input signal. A turn-OFF unit temporality couples the base of the first bipolar transistor to a low-potential side power supply line on the basis of a current flowing in said control means when the first bipolar transistor is turned OFF, so that the first bipolar transistor can be rapidly turned OFF.
REFERENCES:
patent: 5077492 (1991-12-01), Fuse
patent: 5138195 (1992-08-01), Satou et al.
patent: 5198704 (1993-03-01), Nitta
patent: 5239212 (1993-08-01), Masuda
patent: 5254885 (1993-10-01), Ando
patent: 5300829 (1994-04-01), Lev
patent: 5313116 (1994-05-01), Murabayashi
patent: 5341042 (1994-08-01), Chen
patent: 5355030 (1994-10-01), Buchholtz et al.
IEEE Journal of Solid-State Circuits, vol. 26, No. 3, Mar. 1, 1991, New York, US, pp. 427-431, XP000222623. toshiaki hanibuchi et al.: "A Bipolar-PMOS Merged Basic Cell for 0.8-uM BICMOS Sea of Gates"(figures 1,6).
IBM Technical Disclosure Bulletin, vol. 33, No. 1A, Jun. 1, 1990, Armonk, NY, US, pp. 274-278, XP000120190 "Improved BIFET Circuit" (figure 1).
Patent Abstracts of Japan, vol. 15, No. 365 (E-1111), 13 Sep. 1991 & JP-A-03-142870 (Fujitsu Ltd; Others: 02) Jun. 18, 1991 (abrege).
Ebihara Kou
Ishiwata Keisuke
Kamiyama Masamichi
Miki Kouji
Miyamura Tamio
Driscoll Benjamin D.
Fujitsu Limited
Westin Edward P.
LandOfFree
Bi-CMOS circuits with enhanced power supply noise suppression an does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bi-CMOS circuits with enhanced power supply noise suppression an, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bi-CMOS circuits with enhanced power supply noise suppression an will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1856274