Batched checking of shared memory accesses

Details Batched checking of shared memory accesses Batched checking of shared memory accesses

1996-07-17

1998-09-01

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

711147, 395709, G06F 1200, G06F 944

Patent

active

058025855

ABSTRACT:
In a distributed shared memory computer system a plurality of workstations are connected to each other by a network. Each workstation includes a processor, a memory having addresses, and an input/output interface connected to each other by a bus. The input/output interfaces connect the workstations to each other by the network. In a software implemented method for batching access checks to shared data stored in the memories, a set of the addresses of the memories are designated virtual shared addresses to store shared data. A portion of the virtual shared addresses is allocated to store a shared data structure as one or more lines accessible by instructions of the programs executing in any of the processors, the size of each line being a predetermined number of bytes. The programs are analyzed to locate a set of instructions of a particular program which access a range of target addresses storing shared data, the range of target addresses being no greater than the size of one line. In response to determining that accesses to the shared data stored at a first and last addresses of the range of target addresses are valid, the set of instructions are executed. If accesses to the shared data stored at the first or last addresses of the range of target addresses are invalid, miss handling is executed before executing the set of instructions.

REFERENCES:
patent: 4229790 (1980-10-01), Gilliland et al.
patent: 4511961 (1985-04-01), Penton
patent: 4539637 (1985-09-01), DeBruler
patent: 4953121 (1990-08-01), Muller
patent: 5117350 (1992-05-01), Parrish et al.
patent: 5193180 (1993-03-01), Hastings
patent: 5457789 (1995-10-01), Dietrich, Jr. et al.
patent: 5528761 (1996-06-01), Ooba et al.
patent: 5613063 (1997-03-01), Eustace et al.
patent: 5644709 (1997-07-01), Austin
"Fine-grain Access Control for Distributed Shared Memory," Schoinas et al., Computer Sciences Dept., University of Wisconsin-Madison, ACM ASPLOS VI, Oct. 1994.

Affiliated with

Also associated with

Rating

Batched checking of shared memory accesses does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Batched checking of shared memory accesses, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Batched checking of shared memory accesses will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-284660