Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-05-10
2005-05-10
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S288000, C257S289000
Reexamination Certificate
active
06891213
ABSTRACT:
A SRAM memory cell including an access device formed on a storage device is described. The storage device has at least two stable states that may be used to store information. In operation, the access device is switched ON to allow a signal representing data to be coupled to the storage device. The storage device switches to a state representative of the signal and maintains this state after the access device is switched OFF. When the access device is switched ON, the state of the storage device may be sensed to read the data stored in the storage device. The memory cell may be formed to be unusually compact and has a reduced power supply requirements compared to conventional SRAM memory cells. As a result, a compact and robust SRAM having reduced standby power requirements is realized.
REFERENCES:
patent: 4810667 (1989-03-01), Zorinsky et al.
patent: 4881105 (1989-11-01), Davari et al.
patent: 5194396 (1993-03-01), Kim et al.
patent: 5574299 (1996-11-01), Kim
patent: 5592005 (1997-01-01), Floyd et al.
patent: 5594683 (1997-01-01), Chen et al.
patent: 6075272 (2000-06-01), Forbes et al.
patent: 6229161 (2001-05-01), Nemati et al.
patent: 6313490 (2001-11-01), Noble
patent: 6489192 (2002-12-01), Noble
patent: 359232437 (1984-12-01), None
patent: 10135235 (1998-05-01), None
S.D. Malaviya, “Single Device DC Stable Memory Cell”, IBM Technical Disclosure Bulletin, vol. 20, No. 9, Feb. 1978, IBM Corp. 1978, 3492-3494.
Jack Y.C. Sun, CMOS Technology for 1.8V and Beyond:, Semiconductor Research and Development Center, IBM Corporation, pp. 293-297.
Sakui, Koji et al., “A New Static Memory Cell Based on Reverse Base Current (RBC) Effect of Bipolar Transistor”, ULSI Research Center, Toshiba Corporation, Japan, 44-IEDM 88 (4 pages).
Van der Wagt, J.P., et al., “RTD/HFET Low Standby Power SRAM Gain Cell”, IEEE Electron Device Letters, vol. 19, No. 1, Jan. 1998, pp. 6-9.
Verdonckt-Vandebroek, Sophie et al., “Hight-Gain Lateral Bipolar Action in a MOSFET Structure”, IEEE Transactions on Electron Devices, vol. 38, No. 11, Nov. 1991, pp. 2487-2496.
Dorsey & Whitney LLP
Wojciechowicz Edward
LandOfFree
Base current reversal SRAM memory cell and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Base current reversal SRAM memory cell and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Base current reversal SRAM memory cell and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3420751