Barrier process for Ta.sub.2 O.sub.5 capacitor

Details Barrier process for Ta.sub.2 O.sub.5 capacitor Barrier process for Ta.sub.2 O.sub.5 capacitor

1994-02-08

1994-11-08

Thomas, Tom

Fishing, trapping, and vermin destroying

437 52, 437 60, 437238, 437919, H01L 2170

Patent

active

053626320

ABSTRACT:
The method of the present invention introduces a fabrication method for forming a storage capacitor on a supporting silicon substrate of a semiconductor device, by the steps of: forming a bottom capacitor electrode comprising conductively doped polysilicon; forming an insulating layer over the bottom electrode via a first rapid thermal processing step (RTP) using rapid thermal silicon nitride (RTN); forming a capacitor dielectric material comprising tantalum oxide (Ta.sub.2 O.sub.5) over the insulating layer; forming a semiconductive layer comprising polysilicon over the capacitor dielectric material; converting the semiconductive layer into a reaction prevention barrier by subjecting the semiconductive layer to a second rapid thermal processing step (RTP) using rapid thermal silicon nitride (RTN); and forming a top capacitor conductive electrode comprising titanium nitride (TiN) over the reaction prevention barrier.

REFERENCES:
patent: 4891684 (1990-01-01), Nishiolc et al.
patent: 5142438 (1992-08-01), Reinberg et al.
patent: 5286668 (1994-02-01), Chou

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