Barrier for capacitor over plug structures

Details Barrier for capacitor over plug structures Barrier for capacitor over plug structures

2002-04-26

2003-06-24

Clark, Sheila V. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S295000

Reexamination Certificate

active

06583507

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a barrier stack used in, for example, integrated circuits (ICs) which reduces diffusion of atoms or molecules, such as oxygen. More particularly, the barrier stack reduces oxidation of the plug in capacitor over plug structures.
BACKGROUND OF THE INVENTION
Memory ICs comprise a plurality of memory cells interconnected by bitlines and wordlines. A memory cell includes a transistor coupled to a capacitor for storage of a bit of information. To realize high density memory ICs, the memory cells employ a capacitor-over-plug (COP) structure, as shown in FIG.
1
. The structure includes a capacitor
140
having a dielectric layer
146
located between first and second electrodes
141
and
142
. The capacitor is coupled to a conductive plug
170
.
Typically, a high temperature anneal in an oxygen (O
2
) ambient is required to improve the properties of the dielectric layer, particularly for high k dielectric and ferroelectric materials. Additionally, another anneal in O
2
is required to repair the damage caused by etching of the contact hole
165
. Typically, the anneals are performed at 700° C. for 1 hour. During the anneals, O
2
diffuses through the capacitor and oxidizes the plug. This can lead to performance degradation and, in some cases, failures as a result of increased plug resistivity or electrical open connections.
To prevent diffusion of oxygen through the capacitor, a barrier layer
187
formed from iridium is provided between the lower electrode and the plug. Iridium (Ir) is used due to its good barrier properties against O
2
. Since Ir has a tendency to delaminate from the ILD layer (e.g., silicon dioxide or silicon nitride), a titanium nitride layer
182
is provided between the layers to promote adhesion. However, as shown, sidewalls of the barrier and adhesion layers are exposed. Oxygen can diffuse through the exposed sidewalls and horizontally along the interfaces between the adhesion, barrier, and ILD, oxidizing the adhesion layer, in some cases, the plug.
From the foregoing discussion, it is desirable to provide an improved barrier layer for reducing oxidation of the plug in a capacitor over plug structure.
SUMMARY OF THE INVENTION
The invention relates generally to the formation of capacitors over plug structures. In one embodiment, an improved barrier stack which reduces oxidation of the plug is described. The barrier stack is located between an adhesion layer and a capacitor to reduce oxidation of the plug.
In one embodiment, a non-conductive adhesion layer is provided on an interlevel dielectric layer except where the plug is located. The adhesion layer, in one embodiment, comprises titanium oxide. First and second conductive barrier layers are provided between the adhesion layer and the capacitor. The first barrier layer is disposed between the second barrier layer and adhesion layer. The second barrier layer covers the top surface and sidewalls of the first barrier layer. In one embodiment, the first barrier layer comprises Ir and the second barrier layer comprises IrO
x
. The second barrier layer inhibits the diffusion of, for example, O
2
through the sidewalls of the first barrier layer and interface of the adhesion and first barrier layer, thereby reducing or avoiding plug oxidation.


REFERENCES:
patent: 5744832 (1998-04-01), Wolters et al.
patent: 6046469 (2000-04-01), Yamazaki et al.
patent: 6107136 (2000-08-01), Melnick et al.
patent: 6465828 (2002-10-01), Agarwal

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