Bank controller, information processing device, imaging...

Details Bank controller, information processing device, imaging... Bank controller, information processing device, imaging...

2007-01-22

2010-12-07

Kim, Hong (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C707S752000, C711S151000, C710S040000, C710S244000

Reexamination Certificate

active

07849277

ABSTRACT:
A bank controller, an information processing device, an imaging device, and a control method are provided which enable improved data communication processing between FIFO memories of processing blocks and a synchronous DRAM. An arbiter determines the order of priorities in data communication performed between FIFO memories and associated banks. A precharge period detecting block detects the states of precharge of the banks. A register stores data required to determine the order of priorities (data indicating whether the banks are in a precharge period, data indicating whether data communication request signals are presented). This enables the arbiter to exclude FIFO memories that are associated with banks that are not allowed to perform data communication. Efficient data communication is thus implemented between the FIFO memories and the synchronous DRAM.

REFERENCES:
patent: 2003/0005253 (2003-01-01), Liao et al.

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