Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate
2005-02-22
2005-02-22
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
Interface
Logic level shifting
C326S041000
Reexamination Certificate
active
06859066
ABSTRACT:
A bank of input/output buffers are configured such that each input buffer in the bank may select from a plurality of voltage references during single-ended operation. Similarly, the pad associated with each input buffer may serve to supply one of the voltage references for other input buffers within the bank.
REFERENCES:
patent: 5877632 (1999-03-01), Goetting et al.
patent: 6078201 (2000-06-01), Crotty
patent: 6377069 (2002-04-01), Veenstra et al.
patent: 6429680 (2002-08-01), Jeffery et al.
Andrews William
Lin Mou C.
Rahman Arifur
Cho James H.
Hallman Jon W.
Lattice Semiconductor Corporation
MacPherson Kwok & Heid LLP
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