Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-05-22
2007-05-22
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185290, C365S185330, C257S192000, C257S315000
Reexamination Certificate
active
10854396
ABSTRACT:
A flash memory cell comprising a silicon-germanium layer with a pair of source/drain regions. A strained silicon layer is formed over the silicon-germanium layer such that the pair of source/drain regions is linked by a channel in the strained silicon layer. A floating gate layer is formed over the channel. The floating gate layer has at least one charge storage region. The floating gate layer may be a planar floating gate, a planar split floating gate, or a vertical split floating gate. A control gate is formed over the floating gate layer. Ballistic direct injection is used to program the memory cell. A first charge storage region of the floating gate layer establishes a virtual source/drain region in the channel. The virtual source/drain region has a lower threshold voltage than the remaining portion of the channel.
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Auduong Gene N.
Leffert Jay & Polglaze P.A.
Micro)n Technology, Inc.
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