Boots – shoes – and leggings
Patent
1995-02-21
1996-10-22
Treat, William M.
Boots, shoes, and leggings
395413, 395800, 364DIG1, G06F 1206
Patent
active
055686303
ABSTRACT:
A technique for extending the data word size and the virtual address space of a pre-existing architecture so that hardware for the extended architecture also supports the pre-existing architecture. Extension of the data word size from m bits to N bits entails widening the machine registers and data paths from m bits to N bits and sign-extending entities of m or fewer bits to N bits when they are loaded into registers. Some of the m-bit instructions, when operating on N-bit sign-extended versions of m-bit entities, produce an N-bit result that may not correspond to the correct m-bit result, sign-extended to N bits. For these instructions compatibility requires that the instructions be further defined to guarantee a sign-extended result. This means that separate N-bit instructions corresponding to these m-bit instructions are needed. The support for up to an N-bit virtual address space is provided in part by widening the virtual address data paths. The extended architecture supports the m-bit architecture's addressing with minimal additional hardware. This is made possible by storing m-bit addresses as N-bit entities in sign-extended form and requiring that the results of address computations on these entities be in sign-extended form.
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Dixit Ashish B.
Freitas Danny L.
Hennessy John L.
Killian Earl A.
Riordan Thomas J.
Silicon Graphics Inc.
Treat William M.
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