Backside silicon removal for face down chip analysis

Details Backside silicon removal for face down chip analysis Backside silicon removal for face down chip analysis

1997-12-11

2000-07-25

Griffin, Steven P.

Etching a substrate: processes

Etching of semiconductor material to produce an article...

216 2, 216 58, 216 63, 216 67, 216 74, 216 79, 216 83, 216 88, 216 89, 216 95, 216 96, 216 99, C23F 100, B44C 122

Patent

active

060933313

ABSTRACT:
A method for the precise removal of the backside silicon on face down semiconductor devices to obtain a planar surface to allow electron beam microprobe analysis of the semiconductor device. The backside silicon is removed by plasma etching in a fluorocarbon based chemical plasma. The epitaxial layer in a CMOS device acts as an etch stop and the buried oxide layer in an SOI device acts as an etch stop.

REFERENCES:
patent: 5086011 (1992-02-01), Shiota
patent: 5359219 (1994-10-01), Hwang
patent: 5821549 (1998-10-01), Talbot et al.

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