Back lapping in-line system for semiconductor device...

Details Back lapping in-line system for semiconductor device... Back lapping in-line system for semiconductor device...

1999-01-21

2001-07-31

Gordon, Paul P. (Department: 2121)

Data processing: generic control systems or specific application

Specific application, apparatus or process

Product assembly or manufacturing

C438S759000

Reexamination Certificate

active

06269281

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a back lapping in-line system for semiconductor device fabrication, and more particularly, to a back lapping in-line system for carrying out an array of processes in-line, including vinyl covering, back side grinding, and vinyl removing.
2. Background of the Related Art
Generally, semiconductor wafers are processed into packages, and before the package process, the back side of the wafer is ground. The array of processes including the back side grinding is called “back lap” or “back grind”.
FIG. 1
shows a conventional back lap process, including back side grinding using a grinder carried out between a wafer fabrication process
10
and an assembly process
22
. The back lap process comprises a pre-process for back side grinding
12
, a vinyl covering
14
, a back side grinding
16
, a vinyl removing
18
, and a process after back side grinding
20
.
The vinyl covering step
14
covers the front side of the wafer with vinyl in order to protect the front side of the wafer with the pattern formed thereon from silicon particulate produced during the back side grinding
16
. The vinyl removing step
18
removes the vinyl from the wafer surface, since the vinyl is no longer needed after the back side grinding
16
.
In the back side grinding
16
, the back side of the wafer is ground using a diamond wheel, and frictional heat is generated during the back side grinding. The wafer may become warped by this heat, causing warpage failure.
The larger the wafer, the more serious the warpage failure, which causes errors in loading and unloading of wafers on a cassette. Sometimes, the warpage failure renders the wafer unusable.
FIG. 2
shows a structure of a conventional facility in which the vinyl covering, back side grinding, and vinyl removing shown in
FIG. 1
can be carried out.
Referring to
FIG. 2
, a network line
30
is connected to manual interfaces
32
,
34
and
36
, which connect to a laminator
38
to carry out the vinyl covering, a back grinder
40
for the back side grinding, and a remover
42
for the vinyl removing, respectively.
The laminator
38
comprises: a loading part
44
, a pre-cut part
46
, a centering part
48
, a wire cut part
50
, and an unloading part
52
. The back grinder
40
comprises: a loading part
54
, a centering part
56
, a grinding part
58
, a cleaning part
60
, and an unloading part
62
. The remover
42
comprises: a loading part
64
, a centering part
66
, a UV (ultra violet) irradiation part
68
, a removing part
70
, and an unloading part
72
.
The laminator
38
, the back side grinder
40
, and the remover
42
are connected to a host computer (not shown), or other facility, via their own manual interfaces
32
,
34
and
36
, respectively, so as to communicate information and carry out their corresponding operations.
However, the laminator
38
, the back side grinder
40
, and the remover
42
of the conventional facility have their own loading and unloading parts as shown in
FIG. 2
; that is, there are common elements in each facility unit.
As a result, time is lost in the conventional facility while loading and unloading at each part. Furthermore, the facility requires temporary holding areas for transferring wafers between the laminator
38
and the back grinder
40
, and between the back grinder
40
and the remover
42
, respectively, thereby requiring additional work space.
In case of a wafer which has a warpage failure after back side grinding, there is a higher risk of it being scratched or broken due to its warped state while it passes through three loading and unloading steps, thereby decreasing production yield.
That is, the conventional facility for back side grinding has problems which decrease productivity, wherein first, wafers are under a higher risk of being damaged during their loading or unloading because the wafers are loaded or unloaded multiple times; second, the conventional facility needs holding space because each unit process is carried out in its corresponding separate facility unit; and third, TAT (Turn Around Time) is longer in the conventional facility because continuity is lost between facility units while performing one single run, and a process can be carried out only after the previous process has been completed.
SYNNART OF THE INVENTION
The present invention is directed to a back lapping in-line system for semiconductor device fabrication for carrying out in-line the processes of vinyl covering, back side grinding, and vinyl removing, so as to grind the back side of a wafer in one single process, which substantially overcomes one or more of the problems due to the limitation and the disadvantages of the related art.
Another object of the present invention is to provide a back lapping in-line system for semiconductor device fabrication for reducing damage to warped inferior wafers by in-line systemizing the unit processes for grinding the back side of a wafer, such as the vinyl covering, the back side grinding, and the vinyl removing, and thus reducing the wafer transfer time between unit processes.
Still another object of the present invention is to provide a back lapping inline system for semiconductor device fabrication for removing unnecessary space for storing wafers between unit processes, by in-line systemizing the unit processes for grinding the back side of a wafer, such as vinyl covering, back side grinding, and vinyl removing.
A further object of the present invention is to provide a back lapping in-line system for semiconductor device fabrication for reducing Turn Around Time by in-line systemizing the unit processes for grinding the back side of a wafer, such as vinyl covering, back side grinding, and vinyl removing.
To achieve these and other advantages, and in accordance with the purpose of the present invention as embodied and broadly described, the back lapping in-line system for semiconductor device fabrication comprises: a server connected to a network line, and having a program therein for controlling a plurality of in-line processes; and an in-line facility connected on-line to the server by a standard communication line, wherein the in-line facility has a plurality of parts, the parts are assembled in order, and each part carries out its corresponding process according to information communicated to and from the server. The plurality of in-line processes comprises: a vinyl covering process, a back side grinding process, and a vinyl removing process, performed successively.
In addition, the plurality of parts of the in-line facility comprises: a loading part in which a wafer is loaded; a first centering part in which a first centering is carried out; a taping laser cutting part in which a pattern surface of the wafer is covered with vinyl, after which the vinyl is trimmed; a second centering part in which a second centering is carried out; a grinding part in which a back side of the wafer is ground; a cleaning part in which the wafer is cleaned; a third centering part in which a third centering is carried out; a UV irradiation part in which the wafer is irradiated with UV light; a removing part in which the vinyl softened by the UV irradiation is removed; and an unloading part for unloading the wafer, wherein each part of the back lapping in-line system carries out its corresponding process, and transfers the wafer controlled by communication to and from the server.
The back lapping in-line system further comprises a plurality of transfer belts or robots with robot arms positioned between adjacent parts of the in-line facility, which transfer the wafer from one part to another.
In addition, the server can be constructed such that the processes are carried out only in pre-selected parts, and non-selected parts transfer the wafer without carrying out their processes.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
paten

Affiliated with

Also associated with

Rating

Back lapping in-line system for semiconductor device... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Back lapping in-line system for semiconductor device..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Back lapping in-line system for semiconductor device... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2550296