Back bias generator

Details Back bias generator Back bias generator

1988-04-29

1990-04-24

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072965, 307443, H03L 100, H03K 301

Patent

active

049202804

ABSTRACT:
A circuit for generating a back bias voltage for use in a semiconductor memory device is disclosed, wherein the back bias voltage is clamped within a desired voltage level. The circuit comprises an oscillator for generating a sequence of square waves having a specified frequency, a buffer adapted to be connected with the output of said oscillator and for buffering the output of said oscillator into the square waves having a level of a source supply voltage, a charge pump circuit for providing a back bias voltage by receiving the output of said buffer, and a clamping circuit adapted to be coupled in parallel between the output of said charge pump circuit and a ground level and for clamping within a specified range the back bias voltage being provided by said charge pump circuit in accordance with variations of said source supply voltage.

REFERENCES:
patent: 4307307 (1981-12-01), Parekh
patent: 4433253 (1984-02-01), Zapisek
patent: 4439692 (1984-03-01), Beekmans et al.
patent: 4631421 (1986-12-01), Inoue et al.
patent: 4794278 (1988-12-01), Vajdic
"Substrate Voltage Regulator", IBM Technical Disclosure Bulletin, vol. 27, No. 2, Jul. 1984, B. Cassidy et al.

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