Avoiding oscillation in self-synchronous bi-directional...

Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop

Reexamination Certificate

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C326S086000, C710S025000

Reexamination Certificate

active

07057414

ABSTRACT:
In a bi-directional, self-synchronous bus for communication between semiconductor devices, a logic delay is provided as a flag to a state machine control for indicating that the bus is making a transition from a low to a high state. The logic delay causes the bus to adaptively idle until the bus settles, making it amenable for a wide variety of bus sizes and topologies. In this way, oscillation of the bus is avoided without slowing the speed of the state machine clock.

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Barus, et al., “Method and System for Providing Bidirectional Asynchronous Communication”, pending U.S. Appl. No. 10/668,488, filed Sep. 23, 2003.

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