Auxiliary circuit structure in a split-lock dual processor...

Details Auxiliary circuit structure in a split-lock dual processor... Auxiliary circuit structure in a split-lock dual processor...

2010-01-21

2011-11-01

Chu, Gabriel (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S011000

Reexamination Certificate

active

08051323

ABSTRACT:
A multiple-processor system2is provided where each processor4-0, 4-1can be dynamically switched between running in a locked mode where one processor4-1checks the operation of the other processor4-0and a split mode where each processor4-0, 4-1operates independently. Multiple auxiliary circuits8-0, 8-1provide auxiliary functions for the plurality of processors4-0, 4-1. In the split mode, each auxiliary circuit8-0, 8-1separately provides auxiliary functions for a corresponding one of the processors4-0, 4-1. To ensure coherency when each processor4-0, 4-1executes a common set of processing operations, in the locked mode a shared one of the auxiliary circuits8-0provides auxiliary functions for all of the processors4-0, 4-1.

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