Autonomous fail-over to hot-spare processor using SMI

Details Autonomous fail-over to hot-spare processor using SMI Autonomous fail-over to hot-spare processor using SMI

2007-07-31

2007-07-31

Le, Dieu-Minh (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S011000

Reexamination Certificate

active

10761721

ABSTRACT:
A method and system for dynamically replacing a failing processor in a server system configured with IA-32 architecture without requiring hardware changes to the IA-32 architecture or administrative effort. At least one processor of the multiprocessor system (MP) is initially provided as a reserve (or hot-spare) processor that remains in an idle, off, or low-power mode. While in that mode, the OS is prevented from initially utilizing the hot-spare processor. When a processor failure is detected, SMI code running on a good processor instructs the OS to hold off allocating processes to the failing processor. Contemporaneously, the SMI (and OS) activates and completes an initialization of the hot-spare processor to prepare it to begin receiving the held-off processes. Control is then returned to the OS, which updates the “active” processor list and allocates the threads that were running on the failing processor to the hot-spare processor.

REFERENCES:
patent: 5251299 (1993-10-01), Masuda et al.
patent: 5898829 (1999-04-01), Morikawa
patent: 6138247 (2000-10-01), McKay et al.
patent: 6240526 (2001-05-01), Petivan et al.
patent: 6931568 (2005-08-01), Abbondanzio et al.

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