Automatically generating multithreaded datapaths

Details Automatically generating multithreaded datapaths Automatically generating multithreaded datapaths

2007-07-05

2009-12-22

Garbowski, Leigh Marie (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

Reexamination Certificate

active

07636909

ABSTRACT:
A method of automatically generating multithreaded datapaths from a circuit description can include identifying a plurality of process threads from a circuit description, wherein each process thread comprises at least one function, and representing each of the plurality of process threads as an order of operations graph including nodes that correspond to functions and edges that indicate dependencies between the functions. The method also can include identifying at least one conditional edge from the order of operations graphs. An updated circuit description can be generated that specifies a multiplexer for each conditional edge.

REFERENCES:
patent: 2007/0237146 (2007-10-01), Hadzic et al.
A. Raghunathan et al., “Controller re-specification to minimize switching activity in controller/data path circuits,” ISLPED 1996 Monterey CA USA, pp. 301-304.

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