Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate
2008-09-02
2011-11-22
Whitmore, Stacy (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Logic design processing
C716S103000
Reexamination Certificate
active
08065641
ABSTRACT:
A system for creating manufacturing test rules. Stimuli for an electronic design are generated automatically by a stimuli generator. The stimuli generator takes into account certain limitations of the design when automatically generating the manufacturing test rules. The design is tested by a testbench using the stimuli. A simulation log for the design is generated by the testbench. The simulation log is then processed by a simulation log processor. An HDL representation of the design is generated by the simulation log processor using the processed simulation log. A gate-level version of the design is generated by a synthesis tool using the HDL representation of the design. The gate-level version of the design is further processed by the synthesis tool to make any necessary modifications. Then, the gate-level version of the design is outputted as the final manufacturing test rule. Thus, creating manufacturing test rules can be completely automated.
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Gerowitz Robert Glen
Muhlada Michael Patrick
Winemiller Chad Everett
International Business Machines - Corporation
Schurmann Daniel H.
Whitmore Stacy
Yee & Associates P.C.
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