Automatic wiring method for semiconductor integrated...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

10864642

ABSTRACT:
A controller arranges macrocells having power terminals and ground terminals in desired positions on a semiconductor chip. The power terminals and ground terminals are arranged in a fourth line layer such that the centers of square power terminals and ground terminals substantially coincide with lattice points, and terminals of different types are not mixed along the same row, for example. The controller then forms an orbital power ring, performs terminal processing of the chip internal power line, retrieves from the terminal information library the defined position of a single terminal in each row from among the power terminals and ground terminals, and identifies the position as that of a terminal to be connected. The controller then forms longitudinal power line for each of the power terminals and ground terminals that has the same line width as one side of the terminals so as to overlap with each of the power terminals and ground terminals forming the same row, and connects the orbital power ring with each of the power terminals and ground terminals.

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