Automatic voltage regulation for processors having different...

Electrical computers and digital processing systems: support – Computer power control

Reexamination Certificate

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Details

C713S320000, C323S281000, C323S285000

Reexamination Certificate

active

06691235

ABSTRACT:

BACKGROUND INFORMATION
1. Field of Invention
This invention relates to a method for automatically setting voltage levels among otherwise interchangeable CPUs, and, more particularly, to a method for determining whether a CPU is a single-voltage device having a unified voltage plane or dual-voltage device having split voltage planes, for determining which voltage(s) are to be applied to the CPU, and for applying appropriate voltage(s) to the CPU voltage plane(s).
2. Description of the Related Art
There are many central processing units (CPUs) which can be used interchangeability within computing systems. This interchangeability promotes an ability to use multiple CPU sources in the manufacture of similar computing systems and to replace one type of CPU with another, in order to repair a computing system having a failing CPU or in order to upgrade the computing system with features available with a new CPU.
A serious obstacle to many types of CPU interchangeability lies in the different voltage requirements of various CPUs. For example, many conventional types of Intel PENTIUM processors, such as model #P54 CTA, use a unified voltage plane (UVP), with the same supply voltage being applied to all voltage pins of the CPU, while the Intel PENTIUM MMX processors, such as model #P55C, use a split voltage plane (SVP), so that a core voltage can be applied to certain pins of the processor while an I/O voltage is applied to other pins of the processor. CPUs from other manufacturers follow a similar pattern, with UVP types requiring a single voltage, and with SVP types requiring two different voltages. In addition to configurational variations in the number of voltage levels required, the individual voltage level requirements vary from one CPU manufacturer to another and among the various models of a single manufacturer. A single pin, generally labeled VCC
2
DET, is provided in various similar types of processors to aid in the determination of the core voltage of the CPU. This pin is either grounded or floating. Certain CPUs from AMD also provide a second pin for voltage identification. However, these pins are inadequate for distinguishing among the different configurations and voltage levels. Thus, what is needed is a method for distinguishing between UVP-type and SVP-type CPUs and for determining the voltage(s) which should be applied to a particular installed CPU.
A conventional voltage regulation circuit for supplying voltage to a CPU has a DC to DC converter, a feedback resistor and a fixed resistor. The output voltage of the DC to DC converter is returned to the input of this converter through the feedback resistor, and the fixed resistor is tied between the input of the converter and electrical ground. The values of the feedback resistor and the fixed resistor determine the output voltage of the DC to DC converter. This circuit is made variable, so that several voltages needed by various CPUs can be alternately produced, by replacing the feedback resistor with several resistors wired in a parallel circuit, with these resistors being individually selectable through the use of DIP switches or jumpers. The difficulties associated with setting the DIP switches or jumpers properly, together with the possible occurrence of defective contact surfaces due to oxidation, are disadvantages of this method.
U.S. Pat. No. 5,867,715 describes an apparatus for programmably converting the operating voltage of the CPU and chipset by means of the firmware programmably setting the operating voltage, instead of by means of adjusting jumpers. The apparatus includes an address decoder unit, a programmable data memory, a DC to DC converter and a feedback resistance switching circuit. In operation, the CPU and chipset output an address signal and digital data which is decoded by an address decoder unit. After identifying the address data, the address decoder unit generates a trigger signal and writes input data specifying the operating voltage to a programmable data memory, which is a non-volatile device, such as a FLASH EEPROM or an EEPROM programmed through the use of a programmable burner operating in response to the data from the address decoder unit. Output signals from the programmable data memory drive inputs to a feedback resistance switching circuit, so that the resistance of the feedback path of the DC to DC converter is varied according to data stored in the programmable data memory. Since the programmable data memory is nonvolatile, the data is not lost when the computing system is turned off and on. However, if the CPU is to be replaced, it must be replaced with the system turned off. If this occurs, and if the replacement CPU has different voltage requirements than the CPU which has been replaced, this apparatus does not provide an automatic means for changing the operating voltage. Thus, what is needed is a system which determines the operating voltage in an automatic fashion as the computing system is turned on.
U.S. Pat. No. 5,632,039 describes a circuit that automatically switches the power supply voltage PVDD provided to a CPU between 3.3 volts and 5 volts. The circuit detects whether the CPU installed in a socket is a 3.3-volt part or a 5-volt part by determining the state of a voltage detect sense pin provided by the socket. If the voltage detect sense pin is driven low, that indicates a 3.3-volt CPU is being used. If a 5-volt CPU is installed, the voltage detect sense pin is left floating by the CPU, which allows a pullup resistor to pull the voltage detect sense pin high. The power supply voltage provided to the CPU is regulated through a power field effect transistor (FET). The gate of the power FET is connected to the output of a voltage reference source and is coupled to a 12-volt supply signal. If the voltage detect sense pin is pulled high, the voltage reference source is turned off, allowing the 12-volt signal to drive the gate of the power FET. This in turn allows the power FET to pass a 5-volt supply signal to the CPU supply signal PVDD. If the voltage detect sense pin is pulled low, the voltage reference source is turned on to drive the gate of the power FET to approximately one threshold voltage above 3.3 volts. In response, the power FET passes only 3.3 volts to the CPU supply signal PVDD.
One method for providing for the use of both UVP and SVP processor types on a single mother board requires a physical connection or disconnection between the core and I/O voltage planes within the motherboard. For a UVP processor, these voltage planes are tied together by jumpers or low resistance resistors. For an SVP processor, these jumpers or resistors are removed, with these voltage planes being connected to separate power supplies. If they are soldered in placed, they must be unsoldered. This requirement for proper identification of the processor type and for physical manipulation of the motherboard creates a risk of processor damage if the jumpers are incorrectly installed for the processor being used. What is needed is a method for automatically identifying whether the processor is UVP or SVP type and for making the appropriate electrical connections without requiring operator intervention.
A second method for providing for the use of both UVP and SVP processor types on a single mother board requires the mother board to be configured with split voltage planes, which are not connected to one another. To convert the mother board for use with a UVP processor, the respective voltage planes of the mother board are coupled inside the processor package. A single voltage is supplied to the core voltage plane of the mother board, and the I/O voltage plane of the mother board is then supplied with voltage through the lead frame. Since electrical power for the I/O voltage plane within the UVP processor, and possibly for other devices on the motherboard, must be fed through the lead frame of the processor system requirements may easily exceed the specifications of the processor. What is needed is a method for automatically switching the I/O voltage plane without causing current for

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