Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2004-08-18
2008-03-04
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07340707
ABSTRACT:
A system and method for automatically tuning timing of a signal (e.g., a data timing signal) utilizing determined delay of a variable delay element and for utilizing such a tuned signal. Various aspects of the invention may comprise experimentally determining delay characteristics of an on-chip variable delay circuit utilizing an on-chip test module. A delay control signal for an on-chip variable delay circuit may be determined based at least in part on the experimentally determined delay characteristics. Timing of a signal may be adjusted by inputting the signal and the delay control signal into the on-chip variable delay circuit. The time-adjusted signal may then be utilized in signal processing. Such signal processing may, for example, comprise receiving an input data timing signal, generating a delayed input data timing signal, and generating an output data timing signal based on the input data timing signal and the delayed input data timing signal.
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Broadcom Corporation
Chiang Jack
McAndrews Held & Malloy Ltd.
Tat Binh
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