Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2004-12-01
2009-02-17
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07493577
ABSTRACT:
A method and system is provided for automatically recognizing geometric points of features in a target design for OPC mask quality calculation. For each feature in the target design, x, y points comprising the feature are traversed and each neighboring pair of points is connected to define respective segments, wherein a set of contiguous segments form a step if the x values of the segments/points all increase or decrease and the same is true for the y values. Physical characteristics of the segments of the respective features are determined by comparing lengths of the segments to one another and to threshold values. Locations of quality measuring points are then determined along particular ones of the segments based on the physical characteristics.
REFERENCES:
patent: 6973633 (2005-12-01), Lippincott et al.
patent: 2005/0164099 (2005-07-01), Gelsomini
Aleshin Stanislav V.
Golubtsov Ilya
Rodin Sergei
LSI Corporation
Siek Vuthe
Strategic Patent Group P.C.
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