Automatic process control of after-etch-inspection critical...

Details Automatic process control of after-etch-inspection critical... Automatic process control of after-etch-inspection critical...

2008-05-27

2008-05-27

Nhu, David (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S197000, C438S672000, C438S700000, C257SE21170, C257SE21290, C257SE21245, C257SE21008, C257S304000, C257SE21585, C257SE21645

Reexamination Certificate

active

11382060

ABSTRACT:
Automatic process control of after-etch-inspection critical dimension. A dielectric layer is deposited over a substrate and is then planarized to a first thickness. A cap oxide layer having a second thickness is deposited, wherein the combination of the first thickness and the second thickness is substantially constant. An ADI CD of a contact hole to be formed on the substrate is altered and pre-determined based on the second thickness of the cap oxide layer. A photoresist layer is formed on the cap oxide layer. An opening having the predetermined ADI CD is formed in the photoresist layer. Using the photoresist layer as an etching mask, the cap oxide layer and the dielectric layer is etched through the opening to form a contact hole having an AEI CD.

REFERENCES:
patent: 5378317 (1995-01-01), Kashiwase
patent: 5674357 (1997-10-01), Sun
patent: 5976968 (1999-11-01), Dai
patent: 6309976 (2001-10-01), Lin et al.
patent: 2005/0059251 (2005-03-01), Kao et al.
patent: 2007/0020921 (2007-01-01), Chu et al.
patent: 2007/0155157 (2007-07-01), Chou et al.
patent: 2007/0210454 (2007-09-01), Chou et al.

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