Automatic picture display position adjusting circuit and...

Television – Synchronization – Control of picture position

Reexamination Certificate

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Details

C345S699000, C345S698000

Reexamination Certificate

active

06421092

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an automatic picture display position adjusting circuit which, in response to the various input signals with different timings of synchronizing signals, automatically adjusts positions and sizes of pictures to the effective picture display area of a pixel display device including a liquid crystal display device consisting of a great number of pixels, and a picture display apparatus using the automatic picture display position adjusting circuit and the pixel display device mentioned above.
BACKGROUND OF THE INVENTION
Along with the development of computers, signals input in a display apparatus have become increasingly diversified. In order to deal with such a variety of signals, a multiscan-type display has now become mainstream. However, as it is disclosed in Japanese Patent Laid Open 10-198309, even with the multiscan type display, it is difficult to correctly judge all of the various signals and precisely display pictures on the effective picture display area of the pixel display device. As a result, pictures may become excessively small or large or deviate in position, making a user adjust the picture to the optimum position and size watching at the displayed picture.
SUMMARY OF THE INVENTION
A display device which can display various signals output from the computer without the help of user's conscious effort and manual adjustment of size and positions of the pictures to be displayed, is desirable.
An automatic picture display position adjusting circuit and a display device of the present invention comprises:
A number of pixels converter for converting the number of video signals;
a sync signal separator for separating horizontal and vertical sync signals from the video signal;
A sync timing detector for detecting changes in the number of sync pulses of at least either of the horizontal or vertical signals output from the sync signal separator;
and a calculating/controlling means which, when the sync signal detected by the sync timing detector changes, calculates the value to be set in the number of pixels converter based on the detected changes in sync timing, calculates the display position of video signals being output from the number of pixels converter by reading it, and outputs corrected display position obtained through the recalculation for a right display position of the video signals to the number of pixels converter.
Above described configuration achieves an automatic display of the video signals in the full effective picture display area of a pixel display device without the help of any manual control of a user.


REFERENCES:
patent: 5623316 (1997-04-01), Naito et al.
patent: 5713040 (1998-01-01), Lee
patent: 5801767 (1998-09-01), Wu
patent: 5870073 (1999-02-01), Kitou et al.
patent: 6078317 (2000-06-01), Sawada
patent: 707305 (1996-04-01), None
patent: 730372 (1996-09-01), None
patent: 851401 (1998-07-01), None
patent: 854466 (1998-07-01), None
IBM Technical Disclosure Bulletin, “Automated Video Frequency/Mode Detection And Adjustment”, vol. 38, No. 3, Mar. 1, 1995, pp. 45-47, XP000507972.
European Search Report, application No. EP 99115412, dated Oct.21, 1999.

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