Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-11-21
2006-11-21
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07139991
ABSTRACT:
A method and system for automatically instantiating built-in-system test (BIST) modules in memory designs is disclosed. The method and system include providing a server over a network that integrates a set of design tools, including an automated front-end software process and an automated back-end software process. According to the method and system, a user may access the server over the network and enter a request for a memory design. The front-end software process is then executed to automatically generate a netlist of a BIST from the user request. Thereafter, the back-end software process is executed to automatically generate a placement and route view of the BIST.
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Kretchmer Yaron
O'Brien Thomas
Porter Michael
Dimyan Magid Y.
LSI Logic Corporation
Siek Vuthe
Strategic Patent Group Inc.
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