Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-04-19
2005-04-19
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06883150
ABSTRACT:
Automatic manufacturing test case generation mechanism receives a plurality of design verification test cases (DVTCs) from one or more sources and based thereon automatically generates manufacturing test cases (MTCs). Each of the manufacturing test cases (MTCs) generated by the automatic manufacturing test includes at least a first design verification test case and a second design verification test case.
REFERENCES:
patent: 6363509 (2002-03-01), Parulkar et al.
patent: 6490711 (2002-12-01), Buckley, Jr.
Safford Kevin D.
Soltis, Jr. Donald C.
Undy Stephen R.
Weidner Robert E.
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