Automatic logic designing method and system

Details Automatic logic designing method and system Automatic logic designing method and system

1993-08-16

1996-04-02

Trans, Vincent N.

Boots, shoes, and leggings

364488, G06F 1750

Patent

active

055046908

ABSTRACT:
An automatic logic designing method and system in which a control table describing a condition and a behavior corresponding to the condition which express the specification of a computer is inputted and processed in a processor so that a logic circuit having no redundancy which can be easily seen by the designer is designed at a high speed. The control table is converted into the logic circuit whose function is expressed by a detailed Boolean expression. In an instance, selector logics are allocated in consideration of the polarity of the logic. A redundancy detection process or a redundancy logic elimination process is executed for the redundancy logics designated by a redundancy indicate file. A signal name which can be easily understood by the logic designer is formed. An implementing system includes an input control table file, a functional structure converting section of a conditional equation and a behavioral structure, a regular logic expanding processing section, and a redundancy logic elimination processing section, so that the logic circuit formed is outputted to a Boolean expression file.

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