Automatic integrated circuit routing using spines

Details Automatic integrated circuit routing using spines Automatic integrated circuit routing using spines

2006-09-11

2010-10-26

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07823113

ABSTRACT:
A method and technique of routing interconnects of an integrated circuit providing improved routing quality. In an embodiment of the invention, the technique provides linear spine interconnect routing. In memory array blocks, such as in DRAM and SRAM memory designs, connected pins are generally separated by large distances in a first direction and small distances in a second direction, or a spine or channel region. A route area is defined within the spine region. In one embodiment, obstacles in the route area are identified and corresponding forbidden areas are demarcated. The linear spine interconnect is routed in the first direction within the route area while avoiding the forbidden areas. Pins are connected to the spine interconnect by stitching interconnects. Stitching interconnects are generally routed in the second direction.

REFERENCES:
patent: 4615011 (1986-09-01), Linsker
patent: 4673966 (1987-06-01), Shimoyama
patent: 4777606 (1988-10-01), Fournier
patent: 4782193 (1988-11-01), Linsker
patent: 4811237 (1989-03-01), Putatunda et al.
patent: 4815003 (1989-03-01), Putatunda et al.
patent: 4852015 (1989-07-01), Doyle, Jr.
patent: 4855253 (1989-08-01), Weber
patent: 4965739 (1990-10-01), Ng et al.
patent: 5072402 (1991-12-01), Ashtaputre et al.
patent: 5272645 (1993-12-01), Kawakami et al.
patent: 5353235 (1994-10-01), Do et al.
patent: 5375069 (1994-12-01), Satoh et al.
patent: 5500804 (1996-03-01), Honsinger et al.
patent: 5541005 (1996-07-01), Bezama et al.
patent: 5550748 (1996-08-01), Xiong
patent: 5635736 (1997-06-01), Funaki et al.
patent: 5637920 (1997-06-01), Loo
patent: 5640327 (1997-06-01), Ting
patent: 5646830 (1997-07-01), Nagano
patent: 5650653 (1997-07-01), Rostoker et al.
patent: 5689433 (1997-11-01), Edwards
patent: 5723908 (1998-03-01), Fuchida et al.
patent: 5757089 (1998-05-01), Ishizuka
patent: 5784289 (1998-07-01), Wang
patent: 5790414 (1998-08-01), Okano et al.
patent: 5801385 (1998-09-01), Endo et al.
patent: 5801959 (1998-09-01), Ding et al.
patent: 5811863 (1998-09-01), Rostoker et al.
patent: 5822214 (1998-10-01), Rostoker et al.
patent: 5880969 (1999-03-01), Hama et al.
patent: 5889329 (1999-03-01), Rostoker et al.
patent: 5980093 (1999-11-01), Jones et al.
patent: 6111756 (2000-08-01), Moresco
patent: 6150193 (2000-11-01), Glenn
patent: 6166440 (2000-12-01), Yang
patent: 6219823 (2001-04-01), Hama et al.
patent: 6260183 (2001-07-01), Raspopovic et al.
patent: 6262487 (2001-07-01), Igarashi et al.
patent: 6263475 (2001-07-01), Toyonaga et al.
patent: 6282693 (2001-08-01), Naylor et al.
patent: 6301686 (2001-10-01), Kikuchi et al.
patent: 6301693 (2001-10-01), Naylor et al.
patent: 6307256 (2001-10-01), Chiang et al.
patent: 6316838 (2001-11-01), Ozawa et al.
patent: 6323097 (2001-11-01), Wu et al.
patent: 6324674 (2001-11-01), Andreev et al.
patent: 6324675 (2001-11-01), Dutta et al.
patent: 6349403 (2002-02-01), Dutta et al.
patent: 6408427 (2002-06-01), Cong et al.
patent: 6412097 (2002-06-01), Kikuchi et al.
patent: 6448591 (2002-09-01), Juengling
patent: 6480993 (2002-11-01), Suto et al.
patent: 6480996 (2002-11-01), Aji et al.
patent: 6507941 (2003-01-01), Leung et al.
patent: 6510545 (2003-01-01), Yee et al.
patent: 6516455 (2003-02-01), Teig et al.
patent: 6526555 (2003-02-01), Teig et al.
patent: 6543043 (2003-04-01), Wang et al.
patent: 6553338 (2003-04-01), Buch et al.
patent: 6564366 (2003-05-01), Marchenko et al.
patent: 6598215 (2003-07-01), Das et al.
patent: 6645842 (2003-11-01), Igarashi et al.
patent: 6662348 (2003-12-01), Naylor et al.
patent: 6671859 (2003-12-01), Naylor et al.
patent: 6711727 (2004-03-01), Teig et al.
patent: 6734472 (2004-05-01), Ho
patent: 6895567 (2005-05-01), Teig et al.
patent: 6931610 (2005-08-01), Buch et al.
patent: 7065729 (2006-06-01), Chapman
patent: 7100135 (2006-08-01), Meyer et al.
patent: 2001/0004763 (2001-06-01), Kato
patent: 2001/0009031 (2001-07-01), Nitta et al.
patent: 2002/0069397 (2002-06-01), Teig et al.
patent: 2002/0113619 (2002-08-01), Wong
patent: 2003/0025205 (2003-02-01), Shively
patent: 2004/0210862 (2004-10-01), Igarashi et al.
patent: 2004/0250230 (2004-12-01), Itou et al.
patent: 2005/0240893 (2005-10-01), Teig et al.
patent: 2006/0095872 (2006-05-01), McElvain et al.
Finch, A.C. et al., “A Method for Gridless Routing of Printed Circuit Boards”, IEEE, Paper 32.2, 1985, pp. 509-515.

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