Automatic hold time fixing circuit unit

Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop

Reexamination Certificate

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Details

C326S093000, C327S198000

Reexamination Certificate

active

07876127

ABSTRACT:
An automatic hold time fixing circuit unit includes a first switch having first and second ends connected to data input and output ports. An input end of a memory element is connected to the second end of the first switch. A second switch includes a first end connected to an output end of the memory element and a second end connected to the data output port. A control circuit includes first and second output terminals and first and second input terminals. The first and second output terminals are connected to control ends of the first and second switches. The first and second input terminals allow input of two clocks to the control circuit for controlling connection or disconnection of the first and second switches. The data stored in the memory element can be utilized to fix a hold time of the data, so that correct data can be obtained at the data output port.

REFERENCES:
patent: 5081377 (1992-01-01), Freyman
patent: 5654658 (1997-08-01), Kubota et al.
patent: 5912428 (1999-06-01), Patti
patent: 6407601 (2002-06-01), Lin
patent: 6538471 (2003-03-01), Stan et al.
patent: 6646464 (2003-11-01), Maruyama
patent: 2006/0038596 (2006-02-01), Wang

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