Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-04-05
2005-04-05
Lane, Jack A. (Department: 2188)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C703S014000, C703S021000, C703S019000
Reexamination Certificate
active
06877145
ABSTRACT:
A program tool automatically generating interconnect logic for a system-on-a-chip is based on a library of operational cores and on a architecture which requires all data exchange between cores to proceed via shared memory, which may be ‘off-chip’. The architecture includes a data aggregation technique for access to memory with successive levels of arbitration.
REFERENCES:
patent: 5563800 (1996-10-01), Matsumoto et al.
patent: 5633807 (1997-05-01), Fishburn et al.
patent: 2209857 (1989-05-01), None
Boylan Sean
Coburn Derek
Creedon Tadhg
De Paor Denise
Gavin Vincent
3Com Corporation
Lane Jack A.
Nixon & Vanderhye P.C.
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