Automated multi-PC-motherboard memory-module test system...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Details

C714S718000

Reexamination Certificate

active

06415397

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to electronic test systems, and more particularly to robotic testers for memory modules including SIMMs and DIMMs.
BACKGROUND OF THE INVENTION
Personal computers (PCs) commonly use DRAM memory chips mounted on small, removable memory modules. The original single-inline memory modules (SIMMs) have been replaced with dual-inline memory modules (DIMMs), and 184-pin RIMMs (Rambus inline memory modules) and 184-pin DDR (double data rate) DIMMs.
The memory-module industry is very cost sensitive. Testing costs are significant, especially for higher-density modules. Specialized, high-speed electronic test equipment is expensive, and the greater number of memory cells on high-speed memory modules increases the time spent on the tester, increasing costs.
Handlers for integrated circuits (ICs) have been used for many years in the semiconductor industry. Handlers accept a stack of IC chips that are fed, one at a time, to the tester. The tested IC is then sorted into a “bin” for IC chips that have passed or failed the test.
More recently, handlers have been made for memory modules. U.S. Pat. No. 5,704,489 by Smith, describes in detail a “SIMM/DIMM Board Handler” such as those in use today.
FIG. 1
shows a SIMM handler connected to a high-speed electronic tester. Memory modules
18
to be tested are loaded into the top of handler
10
in the input stack. Memory modules
18
drop down, one-by-one, into testing area. Module-under test MUT
20
is next to be tested. Arm
26
pushes MUT
20
laterally until it makes contact with contactor pins
16
that clamp down on “leadless” connector pads formed on the substrate of MUT
20
.
Contactor pins
16
are also connected to test head
14
, which makes connection to tester
12
. Tester
12
executes parametric and functional test programs that determine when MUT
20
falls within specified A.C. and D.C. parameters, and whether all memory bit locations can have both a zero and a one written and read back.
Tester
12
can cost from ten-thousand to millions of dollars. Cost can be reduced if a less-expensive tester replaces tester
12
. Since most memory modules are intended for installation on PCs, some manufacturers test memory modules simply by plugging them into SIMM or DIMM sockets on PC motherboards. A test program is then executed on the PC, testing the inserted module. Since PCs cost only about a thousand dollars, tester
12
and handler
10
of
FIG. 1
are replaced by a low-cost PC. Equipment costs are thus reduced by a factor of a hundred.
FIG. 2
shows a PC motherboard being used to manually test memory modules. Substrate
30
is a motherboard. Components
42
,
44
, mounted on the top side of substrate
30
, include ICs such as a microprocessor, logic chips, buffers, and peripheral controllers. Sockets for expansion cards
46
are also mounted onto the top or component side of substrate
30
.
Memory modules
36
are SIMM or DIMM modules that fit into SIMM/DIMM sockets
38
. SIMM/DIMM sockets
38
(hereinafter SIMM sockets
38
) have metal pins that fit through holes in substrate
30
. These pins are soldered to solder-side
34
of substrate
30
to rigidly attach SIMM sockets to the PC motherboard. Both electrical connection and mechanical support are provided by SIMM sockets
38
.
While using PC motherboards for testing memory modules greatly reduces equipment costs, labor costs are increased. Memory modules must be inserted and removed manually. Manual insertion and removal of memory modules is slow and labor-intensive.
The parent application teaches that the component side of the PC motherboard is too crowded for attaching a SIMM/DIMM handler. However, the inventors have realized that the back or solder-side of the PC motherboard is less crowded and provides unobstructed access. The PC motherboard is modified to provide reverse attachment of the handler to the solder-side of the PC motherboard using a handler adapter board. The SIMM socket on the component side of the PC motherboard is removed, and the handler adapter board is plugged from the backside into the holes on the PC motherboard for the SIMM socket.
Handler Mounted Close to PC Motherboard—
FIG. 3
FIG. 3
shows that the SIMM/DIMM handler is mounted close to the backside of the PC motherboard using the handler adaptor board. Handler
10
is not drawn to scale since it is several times larger than a PC motherboard. However,
FIG. 3
does highlight how handler
10
can fit close to the removed SIMM socket. Such close mounting reduces loading and facilitates high-speed testing.
Contactor pins
16
within handler
10
clamp down onto leadless pads on the edge of module-under-test MUT
20
when arm
26
pushes MUT
20
into place for testing. Contactor pins
16
are electrically connected to connectors on the backside of handler
10
. These connectors are edge-type connectors that normally connect with high-speed testers. Typically two connectors are provided. These male-type connectors fit into female-type connectors
54
mounted on handler adaptor board
50
. Handler adaptor board
50
contains metal wiring traces formed therein that route signals from connectors
54
to adaptor pins
52
that protrude out the other side of handler adaptor board
50
.
Adaptor pins
52
can be plugged into female pins
55
that are soldered onto solder-side
34
of the PC motherboard. Female pins
55
have extensions that fit into the through-holes exposed by removal of the SIMM socket, but also have cup-like receptacles for receiving adaptor pins
52
. Using female pins
55
allows handler adaptor board
50
to be easily removed from substrate
30
.
Once MUT
20
has been tested by a test program running on the PC motherboard, MUT
20
is sorted and drops down into either good bin
22
or bad bin
24
. Sorting is in response to a pass/fail signal from the test program running on the PC motherboard.
Handler adaptor board
50
provides electrical connection from the module-under-test (MUT) in handler
10
to the removed SIMM socket on the PC motherboard. Handler adaptor board
50
provides a slight spacing or offset from the solder-side
34
surface of substrate
30
, allowing handler
10
to be plugged directly into connectors
54
on handler adaptor board
50
. Since the offset of adaptor board
50
is slight, the length of electrical connections to the handler is short, minimizing added loading on the PC's memory bus. The relatively flat surface of solder-side
34
allows close mounting of the SIMM/DIMM handler to the PC motherboard.
While the invention described in the parent application has been quite effective, further improvements are desired. Handlers are large, bulky machines that have a tendency to jam up, requiring that a technician un-jam the modules in the handler. While such memory-module handlers are useful, the inventors desire to replace the handler with robotic technology. Robotic arms do not suffer from the jamming problem of modules in a gravity-fed handler.
Newer modules contain “tiny” discrete components (resistors, capacitors) used for filtering signals and clocks. These components are sometimes taller than the memory chips on the module. The discrete components can become dislodged as the modules trickle down the input stack of a gravity-fed handler. Depending on how the components are placed on the module, one side of the module may be taller than the other side, creating an “imbalance” on the modules in the stack. This is major cause for jamming and dislocation of small components.
One memory-module handler is needed for each motherboard. These handlers are still somewhat expensive. A parallel test system with many motherboards each with an adaptor board is desired to increase the throughput of the testing system. Automated visual inspection of passed memory modules is also desired. It is desirable to integrate automated visual inspection with the test system, to reduce manual visual checks of the modules. Costs can then be further reduced.
SUMMARY OF THE INVENTION
A parallel test system for testing memory modules has a pl

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