Automated migration of analog and mixed-signal VLSI design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07409651

ABSTRACT:
A method for migrating an electronic circuit from a source technology to a target technology includes accepting a source circuit that operates in the source technology. The source circuit includes source components interconnected at nodes in accordance with a source topology. Source voltages at the nodes of the source circuit are determined, and the source voltages are transformed to produce respective target voltages suitable for the target technology. The source circuit is separated into sub-circuits, each sub-circuit including one or more of the source components. In each sub-circuit individually, the one or more of the source components are converted to one or more respective target components in the target technology responsively to the target voltages, so as to produce a respective migrated sub-circuit. The migrated sub-circuits are reconnected to produce a target circuit in the target technology, the target circuit having a target topology identical to the source topology.

REFERENCES:
patent: 6453445 (2002-09-01), Kuhn et al.
patent: 2004/0143799 (2004-07-01), Hegde et al.
patent: 2006/0101357 (2006-05-01), Allen et al.
Savio et al.,“Scaling Rules and Parameter Tuning Procedure for Analog Design Reuse in Technology Migration”,May 2004, Proceedings of the 2004 International Symposium on Circuits and Systems, vol. 5, pp. V-117-V-120.
Dennard et al. in “Design of Ion-Implanted MOSFETs with Very Small Physical Dimensions,” IEEE Journal of Solid-State Circuits, vol. SC-9, Oct. 1974, pp. 256-268.
Galup-Montoro, et al., “Resizing Rules for MOS Analog-Design Reuse,” IEEE Design and Test of Computers (19:2), Mar./Apr. 2002, pp. 50-58.
Hammouda et al., “A Fully Automated Approach for Analog Circuit Reuse,” Proceedings of the Fourth IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Canada, Jul. 2004.
Hammouda et al., “Analog IP Migration Using Design Knowledge Extraction,” Proceedings of the 26thIEEE Custom Integrated Circuits Conference, San Jose, California, Sep. 2004, pp. 333-336.
Funaba et al., “A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling,” Analog Integrated Circuits and Signal Processing (25:3), Dec. 2000, pp. 299-307.
Virtuoso® NeoCircuit, produced by Cadence Design Systems, Inc. (San Jose, California). Additional details regarding this product can be found at http://www.cadence.com/products/custom—ic
eocircuit/index.aspx (link active as of Oct. 20, 2005).
Iskander, R. et al., “Synthesis of CMOS Analog Cells using AMIGO”, Proceedings of theDesign, Automation and Test in Europe Conference and Exhibition '03, 1530-1591/03, IEEE.
Graeb, H. et al., “The Sizing Rules Method for Analog Integrated Circuit Design”, 0-783-7247-6/01, 2001, IEEE.
Eckmuller, J. et al., “Hierarchical Characterization of Analog Integrated CMOS Circuits”, Design, Automation and Test in Europe, 1998., Proceedings, Feb. 23-26, 1998, pp. 636-643.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Automated migration of analog and mixed-signal VLSI design does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Automated migration of analog and mixed-signal VLSI design, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Automated migration of analog and mixed-signal VLSI design will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3999167

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.