Automated implementation of non-arithmetic operators in an...

Details Automated implementation of non-arithmetic operators in an... Automated implementation of non-arithmetic operators in an...

2005-03-29

2005-03-29

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C708S232000, C716S030000

Reexamination Certificate

active

06873181

ABSTRACT:
Disclosed is a method of freeing up a non-arithmetic logic block by configuring an LE driving the non-arithmetic logic block to carry out the non-arithmetic logic function of the non-arithmetic logic block. Appropriately configured LEs are identified and the LEs are reconfigured to incorporate or “push back” the non-arithmetic logic into the LE, thus advantageously freeing up the non-arithmetic logic block and allowing it to be used for logic functions driven by other LEs.

REFERENCES:
patent: 5485411 (1996-01-01), Guttag et al.
patent: 5898602 (1999-04-01), Rothman et al.
patent: 6480023 (2002-11-01), Kaviani
Elzinga, S. et al. (Jun. 28, 2000). “Design Tips for HDL Implementation of Arithmetic Functions,”EXILINK® Application Note: Virtex Series, XAPP215(v1.0), pp. 1-13.
EXILINK® (Feb. 28, 2000). “Virtex-E 1.8V Field Programmable Gate Arrays,”The Programmable Logic Data Book 2000Xilinx, Inc. DS022(v1.3) Advance Product Specification, six pages.

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