Automated flow in PSM phase assignment

Details Automated flow in PSM phase assignment Automated flow in PSM phase assignment

2002-04-03

2004-03-09

Smith, Matthew (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06704921

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a phase shifting mask (PSM) process, and particularly to an automated flow in PSM phase assignment.
2. Description of the Related Art
In designing an integrated circuit (IC), engineers typically rely upon computer-implemented tools to help create a circuit schematic design consisting of individual devices coupled together to perform a certain function. To fabricate this circuit in a semiconductor substrate on a wafer, the circuit must be translated into a physical representation, called a layout. Computer-aided design (CAD) tools can assist layout designers in the task of translating the discrete circuit elements into geometric shapes (called features) on the layout. After this translation, the layout (or portions thereof) can be transferred onto a physical template, i.e. a mask/reticle.
A mask (usually a quartz plate coated with chrome) is generally created for each layer of the IC design. In less complicated and dense ICs, each mask comprises the features that represent the desired circuit pattern for its corresponding layer. In more complicated and dense ICs in which the size of the features approach the optical limits of the lithography process, the masks may also comprise sub-wavelength, optical proximity correction (OPC) structures, such as serifs, hammerheads, bias and assist bars, which are designed to compensate for proximity effects.
These masks are then used to project their patterns onto the wafer coated with photoresist material. For each layer of the design, a light (visible
on-visible radiation) is shone on the mask corresponding to that layer. This light passes through the clear regions of the mask, whose image exposes the underlying photoresist layer, and is blocked by the opaque regions of the mask, thereby leaving that underlying portion of the photoresist layer unexposed. The exposed photoresist layer is then developed, typically through chemical removal of the exposed
on-exposed regions of the photoresist layer. The result is a wafer coated with a photoresist layer exhibiting the desired pattern, which defines the features of that layer. This lithographic process is then repeated for each layer of the design.
One advance in lithography called phase shifting is able to generate features on the wafer that are smaller than the corresponding wavelength of the light. These ultra-small features are generated by the destructive interference of light in adjacent, complementary pairs of phase shifters having opposite phase, e.g. 0 and 180 degrees. In one embodiment, the phase shifters can be formed on a phase shifting mask (PSM), which is used in conjunction with a binary mask including the above-described features of the layout. In the PSM, complementary phase shifters (hereinafter referred to as shifters) are configured such that the exposure radiation transmitted by one shifter is 180 degrees out of phase with the exposure radiation transmitted by the other shifter. Therefore, rather than constructively interfering and merging into a single image, the projected images destructively interfere where their edges overlap, thereby creating a clear and very small image between the phase shifters.
FIG. 1A
illustrates a view
190
of one portion of a phase shifting mask (PSM) superimposed on a corresponding portion of a layout. The layout includes three features
191
,
194
, and
197
, wherein each feature could implement a gate of a transistor. Shifters
192
and
193
are associated with feature
191
, shifters
195
and
196
are associated with feature
194
, and shifters
198
and
199
are associated with feature
197
. Note that these shifters can be light transmissive areas on an otherwise opaque PSM mask (assuming a dark field mask)(and noting that the opaque portion is not shown so as not to obscure features
191
,
194
, and
197
).
Without shifters
192
,
193
,
195
,
196
,
198
, and
199
, the projection of features
191
,
194
, and
197
onto the wafer would be limited by the resolution of the optical process. However, if the light of a single wavelength passing through one of the shifters, e.g. shifter
192
, is out of phase (by 180 degrees or n radians) with the light of the same wavelength passing through the other shifter, e.g. shifter
193
, then an interference pattern is set up on the wafer. (For ease of reference, shifters of a different phase are indicated with a different fill pattern.) This interference generates a printed feature having a width that is less than the width that could be achieved using only feature
191
on a binary mask.
A phase conflict can exist if two shifters have an undesirable lithographic result. For example, in view
190
, shifters
192
and
195
could create a printed feature on the wafer where no feature is desired; however, the printed feature may be acceptable if it can be removed by a second exposure. Shifter pairs
193
/
196
and
193
/
199
could produce similar, undesirable printing results, which cannot be removed because the conflict requires the same location on the phase shifting mask to have two different phases. Similarly, the phase conflict caused by shifters
178
and
179
cannot be resolved using current phase shifter design rules. Therefore, those phase shifters could be removed from the PSM. In some instances, a more efficient and cost-effective process for production environments would eliminate the phase conflicts themselves.
Currently, tools for assigning phase to shifters analyze the layout using cells. For example, view
190
shows a shared edge
189
between one cell including feature
191
and its associated shifters
192
/
193
and a portion of feature
197
and its associated shifters
198
/
199
and another cell including feature
194
and its associated shifters
195
/
196
and a portion of feature
197
. Note that the term “cell” can have various meanings. For example, a cell can refer to shapes or portions thereof in a layout that fall within an analysis pattern used by the tool.
FIG. 1B
illustrates one analysis pattern, i.e. a grid of uniform squares, which defines cells
151
-
159
. In another embodiment, the analysis pattern can define non-uniform cells. For example,
FIG. 1C
illustrates another analysis pattern that defines non-uniform cells
161
-
166
. In yet another embodiment, a cell can be defined by a predetermined set of shapes (features, shifters, etc.) that are associated with one or multiple layers.
Shapes within a cell are treated with one rule set, wherein the rule set includes sizing and positioning of the shapes.
FIG. 1D
illustrates a simplified layout for a transistor including a gate
185
(which could be defined by a binary mask), a diffusion area
186
(which could be defined by an n-well mask), and shifters
183
and
184
(which could be defined by a PSM). Exemplary parameters in a rule set for this layout could include an endcap margin
181
(measured from an edge of diffusion area
186
to the end of gate
185
), a fieldcap margin
182
(measured from an opposite edge of diffusion area
186
to a line connected to gate
185
), and a shifter width
187
. Other parameters could, for example, shifter length and a minimum spacing between shifters.
Selecting the value of the parameters can significantly change the resolution of the printed features defined by the cell. For example, wide shifters provide better printing resolution than narrow shifters. Additionally, large endcap and fieldcap margins provide better printing resolution than small endcap and fieldcap margins. A rule set including parameter values that can provide better lithographic performance is considered “more aggressive” than a rule set including parameter values that can provide less optimal lithographic performance. Therefore, to optimize printing resolution, the most aggressive rule set possible should used for each cell in the layout.
Unfortunately, using an aggressive rule set to optimize printing resolution can generate more phase conflicts than if a less aggressive rule set is used. In a layout with m

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