Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1997-01-24
1999-08-31
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
710 22, G06F 1312
Patent
active
059467088
ABSTRACT:
An embodiment of an automated cache manager includes a word/block converter, which generates a word count from a valid cache block register, a current block register, and a total block transfer register. For example, the word/block converter obtains the number of valid cache blocks and calculates a partial transfer length based on the number of valid cache blocks, the total block transfer length, and the maximum partial transfer length. The automated cache manager then initiates a partial transfer with the calculated partial transfer length.
REFERENCES:
patent: 4723223 (1988-02-01), Hanada
patent: 5333290 (1994-07-01), Kato
patent: 5581715 (1996-12-01), Verinsky et al.
patent: 5623700 (1997-04-01), Parks et al.
Chang Chao-I
Fang Cheng-Chi
Chan Eddie P.
Edwards Gary J.
Ellis Kevin L.
Integrated Memory Logic, Inc
MacPherson Alan H.
LandOfFree
Automated cache manager for storage devices does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Automated cache manager for storage devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Automated cache manager for storage devices will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2428932