Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
1999-09-10
2003-03-25
Baker, Stephen M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
C369S053130, C369S053130
Reexamination Certificate
active
06539518
ABSTRACT:
BACKGROUND
1. Fielf of the Invention
This invention relates generally to disk controllers and in particular to a disk controller for DVD-ROM/RAM/R and CD-ROM drives.
2. Related Art
Advances in semiconductor manufacturing and microprocessor design have combined to create microprocessors with enormous processing power running at very high frequencies. However, the benefits of fast microprocessors are lost in a computer system that is also unable to retrieve data at a very high rate. Many techniques to improve the rate of data transfer between the microprocessor and main memory have been developed. However, the data transfer rate from storage devices—such as CD-ROM drives, DVD ROM/RAM/R, hard drives, and tape drives—to main memory or directly to the microprocessor still presents a bottleneck to the overall performance of the computer system.
Many computer applications process large quantities of data. For example, a multimedia application may process both video and audio data. High resolution graphics and high quality sound require a vast amount of audio and video data that must be transferred between the physical storage device and the multimedia system. CD-ROM disks are inexpensive to manufacture and hold a large quantity of data and therefore are the preferred medium for storing data. Another popular medium for multimedia data storage is digital video disk (DVD). However, other storage devices such as magnetic fixed disks and magneto-optical disks are also used. The data transfer rate between the storage device and the processor may dictate the speed of the entire computer system because data must be retrieved from the storage device for the application program. An increase in the data transfer rate between the storage device and the host system, therefore, increase the speed of the entire computer system.
FIG. 1
shows a block diagram of a typical storage device
100
coupled to a host computer system
190
through a peripheral bus
160
. A storage media
110
, for example a CD-ROM, a DVD, a magnetic disk, or a magnetic tape, is driven by a motor
114
under the control of a motor/servo controller
118
. Data on storage media
110
are stored in storage media data blocks. The specific format of a storage media data block is standardized but is different for each medium. FIG.
3
(
b
) illustrates a storage media block of a CD-ROM disk and FIGS.
3
(
c
) and
3
(
d
) illustrate a storage media block for a DVD after the data is retrieved and processed by a typical CD-ROM/DVD controller. A signal detector/writer
122
(see FIG.
1
), i.e., an optical head or a magnetic head, reads and writes data into storage media
110
. Signal detector/writer
122
may read or generate feedback signals that are sent to motor/servo controller
118
for synchronization and tracking purposes.
On read transfers, the signal read by signal detector/writer
122
is amplified by an amplifier
126
. In storage devices, synchronization data are also amplified before being sent to motor/servo controller
118
. The amplified data signal is then sent to a digital signal processor (DSP)
130
, which may also provide control signals to motor/servo controller
118
, after converting the analog data signal to a digital signal in analog to digital converter
135
. DSP
130
processes the digitized data in preparation for use by host computer system
190
.
For example, a CD-ROM drive typically provides audio data recorded in digital form to an external amplifier in analog form. The processed digital data is sent to a device controller
140
. In some storage devices, a secondary data channel may also be stored on storage media
110
. For example, a CD-ROM disk contains a secondary data channel called the subcode data channel. On write transfers, DSP
130
generates a data signal for signal detector/writer
122
in response to data received from host computer system
190
.
Device controller
140
typically uses a memory buffer
150
as a cache or buffer memory for the processed data from storage media
110
or the incoming data from host computer system
190
. Device controller
140
also provides an interface between storage device
100
and peripheral bus
160
.
Peripheral bus
160
could be, for example, an IDE bus using ATAPI protocols, a SCSI bus or an IEEE 1394-1995 bus. Because peripheral bus
160
communicates with many different types of storage devices, transfers on peripheral bus
160
are typically based on the number of data words to transfer rather than the number of storage media blocks. Peripheral bus
160
couples storage device
100
to host computer system
190
.
Storage device
100
also contains a microcontroller
170
, which could be a microprocessor, to control the components of storage device
100
. Microcontroller
170
may use a portion of memory buffer
150
for system information. Microcontroller
170
executes firmware instructions, i.e. computer code stored in microcontroller
170
, a ROM (not shown) or a flash memory device (not shown), to interface with host computer system
190
in conjunction with device controller
140
through peripheral bus
160
. To reduce the cost of storage device
100
, microcontroller
170
is typically a less powerful device than the microprocessor of host computer system
190
. Therefore, microcontroller
170
executes instructions at a slower rate than the microprocessor of host computer system
190
, further decreasing the data transfer rate between storage device
100
and host computer system
190
.
In a typical read transaction, host computer system
190
sends a request for data through peripheral bus
160
to microcontroller
170
and device controller
140
. Microcontroller
170
, along with device controller
140
, interprets the request and retrieves the requested data from storage media
110
into memory buffer
150
. When memory buffer
150
contains a sufficient amount of data, device controller
140
and microcontroller
170
sends the stored data from memory buffer
150
to host computer system
190
through peripheral bus
160
. The specific amount of data stored in memory buffer
150
before transfer to host computer system
190
depends on the specific request made by host computer system
190
.
In a typical write transaction, host computer system
190
sends a write request to peripheral bus
160
. Microcontroller
170
along with device controller
140
interprets the request and receives the incoming data from host computer system
190
into memory buffer
150
. When memory buffer
150
contains a sufficient amount of data, device controller
140
and microcontroller
170
send the stored data from memory buffer
150
to storage media
110
.
Interfacing with peripheral bus
160
and with storage media
110
is typically very complex. Therefore, the tasks of interfacing is divided between microcontroller
170
and device controller
140
. In conventional storage devices, microcontroller
170
handles the bulk of the control portion of the interfaces and device controller
140
primarily handles the data transfer. However, since microcontroller
170
is a slow device, substantial delays are introduced by over-reliance on microcontroller
170
. Therefore, there is a need for a method or apparatus to interface efficiently with peripheral bus
160
and with storage media
110
without the need for excessive assistance from microcontroller
170
.
SUMMARY
According to the present invention, a device controller (which may also be referred to as a disk controller) having an autodisk controller is presented. The autodisk controller intercepts the interrupt from a storage device interface to a microcontroller when new blocks of data are read from the storage device. In most embodiments, the autodisk controller is capable of operating in a monitor mode or in a buffer mode. In monitoring mode, the autodisk controller is capable of monitoring the block header for the incoming address and, if the block address indicates that a target address has been overshot or another error has been detected, notices the microcontroller. Additionally, if a target
Chang Chao-I
Fang Cheng-Chi
Baker Stephen M.
Integrated Memory Logic, Inc.
Skjerven Morrill LLP
LandOfFree
Autodisk controller does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Autodisk controller, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Autodisk controller will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3083330