Autoconfigurable device that provisionally configures itself...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration

Reexamination Certificate

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Details

C710S011000, C710S014000, C709S208000, C709S209000

Reexamination Certificate

active

06349345

ABSTRACT:

FIELD OF INVENTION
This invention relates generally to computer peripheral devices and more specifically to automatic configuration of primary and secondary devices for personal computers.
BACKGROUND OF THE INVENTION
For personal computers using Intel compatible microprocessors, peripheral devices (for example, magnetic disk drives, compact disc drives, tape drives, and some devices other than mass memory devices) commonly use an industry specified bus interface called AT Attachment (ATA). The computer systems support at least two ATA host adapters (which may be combined on a single printed circuit board), each of which can support up to two peripheral devices. For each host adapter, there may be one primary device (or “master” or device 0) and one secondary device (or “slave” or device 1). In addition, device electronics for a primary device need to be aware of whether there is a secondary device present. Typically, a set of small removable 2-pin connectors (called jumpers) on each device determine, among other things, whether the device is a primary or secondary device, and if primary whether there is a secondary device present. Jumper configurations are not standard, they are typically poorly labeled, and they are typically difficult to access without removing a device. Confusion over jumper requirements has led to a great deal of customer frustration and numerous phone calls to customer service organizations.
Personal computer peripheral devices commonly integrate most of the input/output (I/O) electronics along with the device electronics, using industry specifications called Integrated Drive Electronics (IDE). IDE devices may be designed for many different host computer bus systems, including the AT bus. For Intel compatible personal computers, cabling specifications and signal definitions may be referred to as ATA specifications or IDE specifications, depending on the manufacturer. For Intel compatible personal computers, the most common ATA/IDE mass memory interface cable is a 40-conductor ribbon cable. Connector pin/socket 39 provides a signal called Drive Active/Slave Present (DASP). DASP drivers are implemented as open-collector drivers on the ATA devices. DASP is asserted by driving the line low. DASP is a time multiplexed signal that may be asserted by either device. The signal is used during a power-up/reset initialization phase to indicate that a secondary (slave) device is present, and is used later to indicate device activity. During power-on initialization, if a secondary device is present, the secondary device asserts DASP within 400 milliseconds of power-on. If no secondary device is present, the primary device may assert DASP after a delay of 450 milliseconds after power-on. If a secondary device is present, the secondary device deasserts DASP following the receipt of a valid command or after the secondary device is ready, or after 31 seconds, whichever comes first. Once DASP is deasserted, either device can assert DASP to light a device-activity light emitting diode (LED). If a secondary device is not present, the primary device is then automatically further configured as a primary device with no secondary device present and the primary device then responds to commands sent to a secondary device. If a secondary device asserts DASP within the proper time window, the primary device is automatically further configured as a primary device with a secondary device present and the primary device then does not respond to commands sent to the secondary device. There is no general standard for a provision for a host computer to be able to command a primary device to change its configuration. That is, once a primary device configures itself as “with secondary” or “without secondary” there is no general standard way to override that autoconfiguration.
For ATA/IDE peripheral devices, read and write commands from the host computer are written directly to registers in the peripheral devices. Two signals of interest to the present patent document are Chip-Select-0 (CS0, also known in the industry as CS1FX) and Chip-Select-1 (CS1, also known in the industry as CS3FX) which are asserted by the host (in conjunction with three address lines) to specify a target register in a peripheral device. Typically, about 5 seconds after a system reset, the computer Basic-Input-Output-System (BIOS) asserts CS0 or CS1 as part of an enquiry to see which ATA/IDE devices might be present. A configured device responds by asserting an interrupt signal (INTRQ).
One industry effort to eliminate the need for configuration jumpers for determination of primary/secondary device status is included in an industry specification called Plug and Play ATA. In Plug and Play ATA, primary/secondary device status is determined by which one of two cable connectors is attached to a device. Plug and Play ATA dedicates one wire of a standard interface cable to a signal called Cable Select. The Cable Select line is grounded by the host computer. In the interface cable, the Cable Select line connects to its corresponding socket in the connector for a primary device, and does not connect to its corresponding socket in the connector for a secondary device. If a device connected to the interface cable detects that the Cable Select line is grounded, the device configures itself to be a primary device, and if the device does not detect a ground potential on the Cable Select line the device configures itself to be a secondary device.
Automatic address determination is also a problem for the I/O boards on the I/O bus of the host computer. For Intel compatible computers, one industry specification for automatically configuring I/O boards for the ISA bus is called the Plug and Play ISA Standards. For ISA Plug and Play, each compatible I/O card has a unique identifier that includes a vendor identifier and a serial number. Each compatible I/O card can read its own identifier. The host computer first places all the cards into a configuration mode. Then the host computer drives a line with a series of transitions indicating sequential bit positions within each identifier. At the end of each series, at most only one I/O card remains active. The sequence of bits from the host computer logically progresses from least-significant-bit to most-significant-bit for the identifiers. At each bit position in the sequence, each compatible I/O card determines whether its identifier has a logical one in the same bit position. If the I/O card identifier has a logical one in the same position, the I/O card drives the bus to a particular value. If at any bit position in the sequence an I/O card identifier has a logical zero at the bit position, the I/O card does not drive the bus, and determines whether any other card is driving the bus to the particular value. If at any bit position in the sequence an I/O card identifier has a logical zero at the bit position and another card is driving the bus to the particular value, the I/O card having a logical zero at the bit position ceases to participate in the remainder of the sequence. At the end of all the bit positions for an identifier, one card remains. This card is assigned a logical device number by the host. The sequence is then repeated to isolate another card and so forth until all cards have been assigned an address.
Another common interface standard for ATA devices is the Small Computer System Interface (SCSI). SCSI also requires a unique ID for each device. An industry group has proposed a set of specifications, called Plug and Play SCSI, which among other things provides automatic assignment of unique SCSI IDs. The particular protocol for assignment of unique IDs is called SCSI Configured AutoMagically (SCAM). Each SCAM compatible device has a default ID saved in a non-volatile device memory. A SCAM master device first commands each of the other SCAM devices, one at a time, to go into an inactive state. Then, the master device uses a protocol similar to the protocol for ISA Plug and Play to isolate each device for assignment of a SCSI address.
Plug and Play ATA substantially improves ea

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