Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-01-29
2010-12-07
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07849427
ABSTRACT:
An auto routing method and system provides optimized circuit routing while maintaining proper reference return paths for critical signals. Critical signal paths are auto-routed simultaneously with corresponding reference return paths, and the reference return paths can be merged into reference planes if they are adjacent to regions connected to the same reference net. The reference return paths may be in a plane adjacent to the signal path plane in the same channel, or the reference returns may be routed in adjacent channels in the same plane as the signal path. A check may be performed on endpoints of each critical signal path to determine whether a reference return via is present within a proximity tolerance of the signal path endpoints, and a reference return via placed if not.
REFERENCES:
patent: 6353917 (2002-03-01), Muddu et al.
patent: 6581195 (2003-06-01), Tanaka
patent: 6769102 (2004-07-01), Frank et al.
patent: 6922822 (2005-07-01), Frank et al.
patent: 6993739 (2006-01-01), Becker et al.
patent: 7017128 (2006-03-01), Audet et al.
patent: 7240309 (2007-07-01), Saito et al.
patent: 7272809 (2007-09-01), Becker et al.
patent: 7739624 (2010-06-01), McElvain et al.
patent: 2002/0084107 (2002-07-01), Chang et al.
patent: 2004/0107411 (2004-06-01), Saxena et al.
patent: 2008/0067665 (2008-03-01), Aziz et al.
patent: 2008/0290474 (2008-11-01), Chun et al.
patent: 2009/0031270 (2009-01-01), Douriet et al.
patent: 2009/0193380 (2009-07-01), McElvain et al.
U.S. Appl. No. 11/751,786, filed May 22, 2007, Chun, et al.
U.S. Appl. No. 11/829,179, filed Jul. 27, 2007, Douriet, et al.
Hubing, et al., “Identifying and Quantifying Print Circuit Board Inductance”, Aug. 1994, IEEE International Symposium on Electromagnetic Compatibility, Symposium Record, pp. 205-208.
Chen, et al., “Via and Return Path Discontinuity Impact to High Speed Digital Signal Quality”, Oct. 2000, IEEE Conference on Electrical Performance of Electronic Packaging, Digest, pp. 215-218.
Pak, et al. “Prediction and Verification of Power/Ground Plane Edge Radiation Excited by Through-Hole Signal Via Based on Balanced TLM and Via Coupling Model”, Oct. 2003 IEEE Conference on Electrical Performance of Electronic Packaging, pp. 181-184.
Brokaw, et al. ,“Grounding for Low- and High-Frequency Circuits”, Analog Devices Application Note AN-345, Norwood MA, Mar. 23, 1989.
Christo Michael A.
Maldonado Julio A.
Weekly Roger D.
Zhang Tingdong
Baca Matthew W.
Harris Andrew M.
International Business Machines - Corporation
Kik Phallaka
Mitch Harris Atty at Law, LLC
LandOfFree
Auto-router performing simultaneous placement of signal and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Auto-router performing simultaneous placement of signal and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Auto-router performing simultaneous placement of signal and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4202958