Auto refresh control circuit of semiconductor memory device

Details Auto refresh control circuit of semiconductor memory device Auto refresh control circuit of semiconductor memory device

2005-06-14

2005-06-14

Nguyen, Viet Q. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S230060, C365S230080, C365S227000, C711S105000, C711S106000

Reexamination Certificate

active

06906976

ABSTRACT:
An auto refresh control circuit of a semiconductor memory device comprises a command decoder for generating an auto refresh signal performing an auto refresh operation; a wordline control means for activating wordlines when the auto refresh signal is activated, and for precharging the wordlines when an auto refresh operation is finished; and a buffer control means for inactivating the input buffers when the auto refresh signal is activated or a power down signal is activated, and for activating the input buffers when a signal detecting the end time of an auto refresh is activated. Accordingly, the auto refresh control circuit inactivates all of the buffers and input latches during the auto refresh operation, thereby reducing current consumption.

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