Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2008-05-20
2008-05-20
Knoll, Clifford H (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S306000, C709S238000
Reexamination Certificate
active
11318601
ABSTRACT:
The present invention provides a digital bus circuit comprising: a bus conductor having two sections each connected to a pass circuit, each bus section being connected to two bus interfaces for respective circuits; at least three of the bus interfaces comprising a tri-state output buffer having a tri-state mode and one or more logic output modes; wherein in a unitary bus mode the tri-state output buffers are arranged such that only one of said output buffers is not in a tri-state mode, and the pass circuit is arranged to substantially couple said bus sections; and wherein in a dual bus mode the tri-state output buffers are arranged such that only one of the output buffers connected to each bus section is not in a tri-state mode, and wherein the pass circuit is arranged to substantially isolate said bus sections.
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54LS125A/DM54LS125A/DM74LS125A Quad Tri-State Buffers Data Sheet, National Semiconductor, Jun. 1989, pp. 1-2 (http://rabbit.eng.miami.edu/info/datasheets/74LS125.pdf, accessed Aug. 3, 2007).
Dickstein & Shapiro LLP
Knoll Clifford H
Wolfson Microelectronics plc
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