Semiconductor device manufacturing: process – Making passive device – Trench capacitor
Reexamination Certificate
2001-11-27
2003-04-22
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Making passive device
Trench capacitor
C438S386000, C438S765000, C438S769000, C438S778000, C438S763000, C438S396000
Reexamination Certificate
active
06551893
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to memory cell capacitor structures and, more particularly, to a fabrication process where a capacitor dielectric is formed by atomic layer deposition.
Silicon nitride is commonly employed as the dielectric in memory cell capacitor structures. Unfortunately, conventional process technology is limited in its ability to manufacture suitable reduced-thickness dielectric layers with good uniformity. Accordingly, there is a need for an improved memory cell capacitor dielectric layer manufacturing process.
BRIEF SUMMARY OF THE INVENTION
This need is met by the present invention wherein a capacitor dielectric is formed by atomic layer deposition. The present inventors have recognized that it is difficult to achieve uniform thickness in memory cell dielectric layers, particularly where the dielectric layer is formed in a container-type capacitor structure. The present invention is also applicable to trench-type capacitor structures. Generally, as device size shrinks, thinner dielectric layers are needed to ensure adequate memory cell capacitance. As dielectric layer thickness decreases, non-uniformity leads to reoxidation punch-through and corresponding device degradation. Also, as the dielectric layer thickness decreases, the leakage current attributable to the dielectric layer tends to increase dramatically, deteriorating device performance.
The present invention addresses these problems by providing a manufacturing process where the dielectric layer is formed through atomic layer deposition (ALD). In accordance with several embodiments of the present invention, a process for forming a capacitor structure over a semiconductor substrate is provided. Other embodiments of the present invention relate to processes for forming memory cell capacitor structures, memory cells, and memory cell arrays. Capacitor structures, memory cells, and memory cell arrays are also provided. Accordingly, it is an object of the present invention to provide an improved memory cell capacitor dielectric layer manufacturing process. Other objects of the present invention will be apparent in light of the description of the invention embodied herein.
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Breiner Lyle
Doan Trung T.
Ping Er-Xuan
Zheng Lingyi A.
Duong Khanh B.
Killworth, Gottman Hagan & Schaeff, L.L.P.
Micro)n Technology, Inc.
Zarabian Amir
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