Multiplex communications – Fault recovery – Bypass an inoperative switch or inoperative element of a...
Patent
1997-02-04
1999-03-02
Marcelo, Melvin
Multiplex communications
Fault recovery
Bypass an inoperative switch or inoperative element of a...
370395, 340826, H04L 122, H04L 1256
Patent
active
058780254
ABSTRACT:
A plurality of switching modules arrayed in a plurality of columns and in at least one row switch over paths in accordance with path data contained in cells to transfer inputted data to a target line on the cell-unit. One or more path switching units are provided between two adjacent columns of switching modules among plural columns of switching modules and switch paths between the respective switching modules, disposed in a side-by-side relationship in a row direction, of one column of switching modules of the two adjacent columns of switching modules and the respective switching modules, disposed in the side-by-side relationship in the row direction, of the other column of the two adjacent columns of switching modules.
REFERENCES:
patent: 3649768 (1972-03-01), Curtis
patent: 4038638 (1977-07-01), Hwang
patent: 5091903 (1992-02-01), Schrodi
patent: 5179551 (1993-01-01), Turner
patent: 5325090 (1994-06-01), Goeldner
Kim, H.S. et al., "Design of a Multistage Switching Network for ATM", IEEE International Conference on Communications ICC'90 (Cat. No. 90CH2829-0), pp. 742-746, vol. 2, Apr. 1990.
A. Day, "International Standardization of BISDN", IEEE LTS, Aug. 1991, pp. 7, 13-20.
B.E. Basch et al., "VISTAnet: A BISDN Field Trial", IEEE LTS, Aug. 1991, pp. 22, 25-30.
A. Takahashi et al. "A Broadband Switching System for Public Network" ISS, May 1990, vol. V, pp. 103-109.
K. Hajikano et al., "Asynchronous Transfer Mode Switching Architecture for Broadband ISDN", ICC, Jun. 1988, pp. 0911-0915.
Y. Kato et al, "A VLSIC for the ATM Switching System", ISS, May 1990, vol. 111, pp. 27-32.
K. Chipman et al., "High Performance Applications Development for B-LSDN", ISS, Oct., 1992, pp. 22-26.
H. Tomonaga et al., "High-Speed Switching Module for a Large Capacity ATM System", IEEE, Dec., 1992, pp. 123-127.
Y. Doi et al., "A 160 Gbit/s Large-Capacity ATM Switching System using a Dynamic Link Speed Controlled Switch Architecture", IEEE, 1993, pp. 24-28.
Y. Doi et al., "An ATM Switch using Multichip Module Technology", SSE, Nov., 22, 1991, Abstract.
K. Endo et al, "a Full-matrix Large ATM Switch constructed by Small Size Switch Elements with Control Point Switching Scheme", SSE, 1993 Spring Intro.
S. Sasaki et al., "Multi-chip Module Packaging Technology for Communication Switching Systems", SSE, Nov., 22, 1991, Abstract.
H. Tomonaga et al., "A Structure of Ultrahigh-Speed ATM Switch", SSE, Nov., 1993, Abstract.
H. Tomonaga et al., "A Line Interface Structure for a Large Capacity ATM Switching System", SSE, Apr. 4, 1994, pp. 1-13, cover sheet, 1-6.
Katoh Masafumi
Kawai Masaaki
Matsuoka Naoki
Nakajima Hidenao
Tomonaga Hiroshi
Fujitsu Limited
Marcelo Melvin
LandOfFree
ATM switch and method for switching path by ATM switch does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with ATM switch and method for switching path by ATM switch, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and ATM switch and method for switching path by ATM switch will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-429164