Asynchronous symmetric multiprocessing

Details Asynchronous symmetric multiprocessing Asynchronous symmetric multiprocessing

2008-01-08

2008-01-08

Nguyen, T (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S141000, C711S146000

Reexamination Certificate

active

11103156

ABSTRACT:
An apparatus for serializing concurrent requests to multiple processors includes a signal merging tree structure and a traversal mechanism. The tree structure has a root node and leaf nodes for connecting a data consumer to the root. The tree structure serializes concurrent requests in the presence of race conditions, and connects each request producer from among the processors to a respective leaf node. The mechanism enables a producer to transmit a signal from a corresponding leaf node to the consumer at the root node by setting all nodes on a path from the leaf node to the root node to a Boolean true. The mechanism enables the consumer to trace signal submissions of the producers such that submission traversals by the producers and trace traversals by the consumer can be concurrently performed to allow data races between signal submissions by producers and between signal submissions by producers and the consumer.

REFERENCES:
patent: 6763435 (2004-07-01), Arimilli et al.
patent: 6785774 (2004-08-01), Arimilli et al.

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