Electrical computers and digital data processing systems: input/ – Input/output data processing – Transfer termination
Reexamination Certificate
2011-06-07
2011-06-07
Sorrell, Eron J (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Transfer termination
C710S061000, C710S071000, C714S700000, C714S707000, C713S503000
Reexamination Certificate
active
07958279
ABSTRACT:
A semiconductor integrated circuit apparatus, comprising a data transmitter circuit, and a plurality of data receiver circuits each having a data converter circuit which restores each of bits of identification number data and transfer data from a shift register of the data transmitter circuit to 2-bit complementary data transmitted via first and second transmission lines, a reception control circuit which, when a transfer completion signal has been received via a third transmission line, compares an allocated identification number with the restored identification number data, and a shift register provided in association with the reception control circuit, wherein each reception control circuit feeds transfer data transmitted from the data transmitter circuit corresponding to the identification number data to the associated shift register in accordance with a result of comparison between the identification number data and the allocated identification number.
REFERENCES:
patent: 4344127 (1982-08-01), McDaniel et al.
patent: 4542501 (1985-09-01), Chevalet et al.
patent: 4590467 (1986-05-01), Lare
patent: 5142556 (1992-08-01), Ito
patent: 5386585 (1995-01-01), Traylor
patent: 5822615 (1998-10-01), Yamashita et al.
patent: 2004/0100400 (2004-05-01), Perelman et al.
patent: 0 443 589 (1991-08-01), None
patent: 0 996 262 (2000-04-01), None
patent: 2-52543 (1990-02-01), None
patent: 8-289961 (1996-11-01), None
patent: 8-328636 (1996-12-01), None
patent: 10-145436 (1998-05-01), None
Michael R. Ouellette, Darren L. Anand, and Peter Jakobsen; Shared Fuse Macro for Multiple Embedded Memory Devices with Redundancy; CICC 2001; May 7, 2001.
Fukuda Ryo
Takai Tomohisa
Kabushiki Kaisha Toshiba
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Phan Dean
Sorrell Eron J
LandOfFree
Asynchronous serial data apparatus for transferring data... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Asynchronous serial data apparatus for transferring data..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Asynchronous serial data apparatus for transferring data... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2739734