Asynchronous self-tuning clock domains and method for transferri

Details Asynchronous self-tuning clock domains and method for transferri Asynchronous self-tuning clock domains and method for transferri

1994-09-30

1998-01-20

Butler, Dennis M.

395555, 395558, G06F 104

Patent

active

057109109

ABSTRACT:
One or more domains are independently clocked with separate clocks. Each clock is an asynchronous stop/start clock implementing a self-tuning clocking methodology. Domain circuit speed is monitored and the clock adjusted to tune the domain to run at near maximum speed. Inter-domain data transfers are performed by a four-way handshaking method. In effect the clock period of the respective clocks during the data transfer becomes the slower period of the two domains' clock periods. An inter-domain arbiter is implemented at each domain for deciding which domain's request is to be granted during an immediate clock period. Data input to a domain is tracked to determine when data is present. When no data is present, the domain's clock is stopped.

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