Asynchronous nano-electronics

Details Asynchronous nano-electronics Asynchronous nano-electronics

2011-03-01

2011-03-01

Barnie, Rexford N (Department: 2819)

Electronic digital logic circuitry

Reliability

C326S010000, C326S041000

Reexamination Certificate

active

07898284

ABSTRACT:
Asynchronous nanoelectronic circuits that operate according to principles of quasi-delay insensitive design are described. Circuit or logic elements comprising n-type devices are fabricated in a first n-plane, p-type devices are fabricated in a p-plane, and connections are formed in a routing plane of a compute tile. A state-holding element comprising a selected one of a C-element, a precharge function-block, and a read-write register is described. The state-holding element can hold a value of an output of a logic element during a time when the output is disconnected from a reference voltage. Isochronic forks having an adversary path designed to make state transitions safe are explained.

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