Asynchronous low latency data recovery apparatus and method

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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375369, 375371, 327144, H04L 700

Patent

active

056109539

ABSTRACT:
A receiver device is provided with a low latency recovery apparatus for recovering serially transmitted digital data. The receiver device operates asynchronously in respect to a transmitting device. The low latency recovery apparatus synchronizes the receiver device in one clock time to support throughput of high speed transmission messages received from interconnection networks or interface cables. A metastability proof latch is provided. A synchronization method provides individual alignment for each incoming message. There is instantaneous response to back-to-back messages from different sources. Synchronization is accomplished in the receiving device by implementing a clocking system capable of generating N phase-shifted clocks all operating at the same frequency as the incoming data. The N clocks are shifted an approximately equal amount in relation to each other. The data recovery apparatus selects the one of N clocks which is best in synchronization with the incoming serial data and then to receive the message correctly. The apparatus has a two wire interface for serial data and a bracketing control signal. Serial data is synchronized first to the selected clock and then to a local clock. The bracketing control signals when each message recovery is complete and triggers the start of another message recovery in as little as one clock time.

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