Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2009-05-04
2010-11-09
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Read/write circuit
Signals
C365S230030, C365S189040, C365S230060
Reexamination Certificate
active
07830735
ABSTRACT:
Disclosed herein are embodiments of an asynchronous memory device that use internal delay elements to enable memory access pipelining. In one embodiment, the delay elements are responsive to an input load control signal, and are calibrated with reference to periodically received timing pulses. Different numbers of the delay elements are configured to produce different asynchronous delays and to strobe sequential pipeline elements of the memory device.
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Hampel Craig E.
Stark Donald C.
Tsern Ely K.
Ware Frederick A.
Hoang Huan
Rambus Inc.
Shemwell Charles E.
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