Asynchronous first-in-first-out cell

Details Asynchronous first-in-first-out cell Asynchronous first-in-first-out cell

2007-08-21

2007-08-21

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Serial read/write

C365S230050

Reexamination Certificate

active

11330159

ABSTRACT:
The present invention discloses an asynchronous first-in-first-out cell, wherein modified Muller C elements are used to reduce the complexity of the circuit of the asynchronous first-in-first-out cell; the asynchronous first-in-first-out cell of the present invention not only can be reusable, but also can apply to a single-supply-voltage system with a single clock frequency or multiple clock frequencies and a multiple-supply-voltage system with a single clock frequency or multiple clock frequencies. Further, when the asynchronous first-in-first-out cell of the present invention is applied to the interface circuit of a dual-supply-voltage 16-point radix-22GALS-based FFT architecture, considerable power saving and latency reduction can be achieved.

REFERENCES:
patent: 5550780 (1996-08-01), Chu
patent: 5956748 (1999-09-01), New
patent: 6445635 (2002-09-01), Au et al.
patent: 6611469 (2003-08-01), Williams et al.
patent: 2002/0167337 (2002-11-01), Chelcea et al.
patent: 2004/0128413 (2004-07-01), Chelcea et al.
T. Chelcea and S.M. Nowick, “Robust Interfaces for Mixed-Timing Systems”, IEEE Trans. VLSI Systems, vol. 12, No. 8, pp. 857-873, Aug. 2004.

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