Asynchronous first-in-first-out buffer circuit burst mode contro

Details Asynchronous first-in-first-out buffer circuit burst mode contro Asynchronous first-in-first-out buffer circuit burst mode contro

1997-03-31

2000-05-02

Sheikh, Ayaz R.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

710 35, 710 53, G06F 1300

Patent

active

060584394

ABSTRACT:
A data processing system comprising a first circuit block 6 and a second circuit block 8 linked via an asynchronous first-in-first-out buffer circuit 12 is provided with a burst marker that identifies the first word in a burst transfer or an empty stage. The second circuit block 8 uses the burst marker to identify the last data word in a burst as being that word which immediately precedes such a burst marker.

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