Asynchronous coupling and decoupling of chips

Electronic digital logic circuitry – Reliability – Parasitic prevention in integrated circuit structure

Reexamination Certificate

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C326S014000, C326S021000

Reexamination Certificate

active

11152268

ABSTRACT:
In some embodiments, a chip includes first and second nodes, a variable voltage source, and transmitter and control circuitry. The transmitter includes a driver coupled to the first and second nodes, and first and second resistive structures coupled between the first and second nodes, respectively, and the variable voltage source. The control circuitry selects an impedance level for the first and second resistive structures, and detect coupling of a remote receiver to the transmitter through interconnects and detect decoupling of the remote receiver from the transmitter. Other embodiments are described and claimed.

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